Volume 2, Part 1: Processor Abstraction Layer
2:439
PAL_MEMORY_BUFFER
A memory buffer must be allocated for each physical package, and is shared by all
logical processors on that package. Software is required to call this procedure on all
logical processors on a given package with the same input values. If not, processor
operation is undefined.
If the PAL reset hand-off state indicates that the memory buffer is required but no call
is made to allocate the memory buffer for a given physical package before calling
buffer-dependent PAL procedures on a logical processor on that package, those
procedures return an error.
If software would like to relocate this memory buffer at a later point in time, it can do
so by setting the value of
reg
field in
control_word
to one. PAL will copy the contents of
the existing buffer to a new buffer. Software is still required to make this call on all
logical processors with the same input arguments when relocating the buffer. Once the
call has been made on all logical processors in the physical package, the old memory
can be reclaimed.
Software can choose if it wants this procedure to periodically poll for interrupts during
the execution of the procedure. If an interrupt is seen, the procedure will return a value
of 1 and software must re-call this procedure again on the same logical processor, with
the same input arguments, until the copy is completed. If this procedure returns with a
value of 1, both the old memory buffer and the new memory buffer will be in use by
PAL until PAL returns that the procedure has completed execution successfully by
setting the return value to 0.
An error will be returned if software calls this procedure with the
reg
value set to one to
re-register a buffer and a call has never been made to register the buffer.
It is required that PAL firmware only perform cacheable memory accesses to this buffer.
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...