Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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Parallel I/O Ports
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor 34-25
34.6.2 Port E Special Options Register (PESO)
The port E special options (PESO) register, shown in Table 34-23 below, further configures the on-chip
peripherals along with PEDIR register.
This register is affected by HRESET but is not affected by SRESET. Table 34-27 describes PESO bits.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field — SO14 SO15
Reset — — — — — — — — — — — — — — 0 0
R/W — R/W R/W
Addr 0xAD0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field SO16 SO17 SO18 SO19 SO20 SO21 SO22 SO23 SO24 SO25 SO26 SO27 SO28 SO29 SO30 SO31
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Addr 0xAD2
Figure 34-23. Port E Special Options Register (PESO)
Table 34-27. PESO Bit Descriptions
Bits Name Description
0–13 — Reserved
14 –31 SO n Port E Special Options. If the port E signal is configured as peripheral function, the SO bit
configures further the on-chip peripheral
0 Select the signals for the first choice of the on-chip peripheral
1 Select the signals for the second choice of the on-chip peripheral