Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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External Signals
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor 12-5
TA Hi-Z C12 Bidirectional
active
pull-up
Transfer Acknowledge—Indicates that the slave device
addressed in the current transaction accepted data sent by the
master (write) or has driven the data bus with valid data (read).
This is an output when the PCMCIA interface or memory
controller controls the transaction. The only exception occurs
when the memory controller controls the slave access by means
of the GPCM, and the corresponding option register is instructed
to wait for an external assertion of TA. Every slave device should
negate TA after a transaction ends and immediately three-state it
to avoid bus contention if a new transfer is initiated addressing
other slave devices. TA requires the use of an external pull-up
resistor.
TEA Hi-Z B12 Open-drain Transfer Error Acknowledge—Indicates that a bus error occurred
in the current transaction. The MPC885 asserts TEA when the
bus monitor does not detect a bus cycle termination within a
reasonable amount of time. Asserting TEA terminates the bus
cycle, thus ignoring the state of TA. TEA requires the use of an
external pull-up resistor.
BI Hi-Z D12 Bidirectional
active
pull-up
Burst Inhibit—Indicates that the slave device addressed in the
current burst transaction cannot support burst transfers. It acts as
an output when the PCMCIA interface or the memory controller
takes control of the transaction. BI requires the use of an external
pull-up resistor.
RSV
IRQ2 See
Table 12-3
B10 Bidirectional
three-state
Reservation—The MPC885 outputs this three-state signal with
the address bus to indicate that the core initiated a transfer as a
result of a
stwcx. or lwarx.
Interrupt Request 2—One of eight external inputs that can
request (by means of the internal interrupt controller) a service
routine from the core.
KR/RETRY
IRQ4
SPKROUT See
Table 12-3
C7 Bidirectional
three-state
Kill Reservation—Input used as a part of the memory reservation
protocol, when the MPC885 initiated a transaction as the result of
a
stwcx. instruction. Retry—Input used by a slave device to
indicate it cannot accept the transaction. The MPC885 must
relinquish mastership and reinitiate the transaction after winning
in the bus arbitration.
Interrupt Request 4—One of eight external inputs that can
request (by means of the internal interrupt controller) a service
routine from the core. SPKROUT—Digital audio wave form output
to be driven to the system speaker.
CR
IRQ3 Hi-Z A11 Input Cancel Reservation—Input used as a part of the storage
reservation protocol.
Interrupt Request 3—One of eight external inputs that can
request (by means of the internal interrupt controller) a service
routine from the core.
D[0:31] Hi-Z
1
See
Figure 12-2
Bidirectional
three-state
Data Bus—Bidirectional three-state bus, provides the
general-purpose data path between the MPC885 and all other
devices. The 32-bit data path can be dynamically sized to support
8-, 16-, or 32-bit transfers. D0 is the msb of the data bus.
Table 12-1. MPC885/MPC880 Signal Descriptions (continued)
Name
Hard
Reset
Number Type Description