Serial Interface
MPC885 PowerQUICC Family Reference Manual, Rev. 2
20-8
Freescale Semiconductor
20.2.2
Enabling Connections to the TSA
Each SCC and SMC can be independently enabled to connect to the TSA. The SCCs are connected to the
TSA by programming the SI clock route register SICR[SCx]; see
Section 20.2.4.3, “SI Clock Route
Register (SICR).”
The SMCs are connected to the TSA by setting the mode register SIMODE[SMCx]; see
Section 20.2.4.2, “SI Mode Register (SIMODE).”
The general mode register SIGMR[ENx] must also be
set to enable the individual TDM channels; see
Section 20.2.4.1, “SI Global Mode Register (SIGMR).”
Once the connections are made, the exact routing is determined in the SI RAM. See
Figure 20-4
.
Figure 20-4. Enabling Connections through the SI
20.2.3
SI RAM
The 512-byte SI RAM contains the SCC and SMC routing information for the TDM channels. The SI
RAM totals 128 32-bit entries—64 entries each for receive and transmit routing. Representing one time
slot, an entry controls from 1 to 16 bits/bytes and up to four strobe pins (all active high).
The TDM channel options with their corresponding SI RAM partitioning follow:
•
A single TDM channel with static routing—SI RAM is divided into Rx and Tx parts.
•
Two TDM channels with static routing—Rx and Tx RAMs are halved.
•
A single TDM channel with dynamic routing—Rx and Tx RAMs are halved.
•
Two TDM channels with dynamic routing—Rx and Tx RAMs are quartered.
Time-Slot
Assigner
Control Logic
SI RAM
ENa
ENb
TDMa Pins
Multiplexed
Interface
TDMb Pins
SIGMR[ENb]=1 to enable TDMb
SIGMR[ENa]=1 to enable TDMa
SCC2
SCC3
SCC4
SMC1
SMC2
SICR[SC2]=1
SICR[SC4]=1
SICR[SC3]=1
SIMODE[SMC1]=1
SIMODE[SMC2]=1
SCC2 Pins
SCC3 Pins
SCC4 Pins
SMC1 Pins
SMC2 Pins
SICR[SC2]=0
SICR[SC3]=0
SICR[SC4]=0
SIMODE[SMC1]=0
SIMODE[SMC2]=0
Non-Multiplexed Interface
(clocking paths not shown)
Summary of Contents for PowerQUICC MPC870
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Page 118: ...MPC885 Overview MPC885 PowerQUICC Family Reference Manual Rev 2 1 20 Freescale Semiconductor ...
Page 158: ...The MPC8xx Core MPC885 PowerQUICC Family Reference Manual Rev 2 3 18 Freescale Semiconductor ...
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Page 1090: ...UTOPIA Interface MPC885 PowerQUICC Family Reference Manual Rev 2 43 8 Freescale Semiconductor ...
Page 1312: ...Byte Ordering MPC885 PowerQUICC Family Reference Manual Rev 2 A 8 Freescale Semiconductor ...
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Page 1370: ...MPC880 MPC885 PowerQUICC Family Reference Manual Rev 2 E 4 Freescale Semiconductor ...
Page 1386: ...Revision History MPC885 PowerQUICC Family Reference Manual Rev 2 I 2 Freescale Semiconductor ...