Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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Memory Map
MPC885 PowerQUICC Family Reference Manual, Rev. 2
2-4 Freescale Semiconductor
Clocks and Reset
280 SCCR—System clock reset control register 32 bits 14.6.1/14-18
284 PLPRCR—PLL and reset control register 32 bits 14.6.2/14-21
288 RSR—Reset status register 32 bits 11.2/11-4
28C–2FF Reserved 116 bytes —
System Integration Timers Keys
300 TBSCRK—Timebase status and control register key 32 bits 10.9.3/10-25
304 TBREFAK—Timebase reference register A key 32 bits 10.9.2/10-24
308 TBREFBK—Timebase reference register B key 32 bits 10.9.2/10-24
30C TBK—Timebase/decrementer register key 32 bits 10.8.1/10-22
310–31F Reserved 16 bytes —
320 Reserved 32 bits —
324 Reserved 32 bits —
328 Reserved 32 bits —
32C Reserved 32 bits —
330–33F Reserved 16 bytes —
340 PISCRK—Periodic interrupt status and control
register key
32 bits 10.10.1/10-26
344 PITCK—Periodic interrupt count register key 32 bits 10.10.2/10-27
348–37F Reserved 56 bytes —
Clocks and Reset Keys
380 SCCRK—System clock control key 32 bits 10.4.5/10-9
384 PLPRCRK—PLL and reset control register key 32 bits 10.4.5/10-9
388 RSRK—Reset status register key 32 bits 10.4.5/10-9
38C–85F Reserved 1236 bytes —
I
2
C Controller
860 I2MOD—I
2
C mode register 8 bits 32.4.1/32-6
861–863 Reserved 3 bytes —
864 I2ADD—I
2
C address register 8 bits 32.4.2/32-7
865–867 Reserved 3 bytes —
868 I2BRG—I
2
C BRG register 8 bits 32.4.3/32-7
869–86B Reserved 3 bytes —
Table 2-1. MPC885 Internal Memory Map (IMMR[14–15]=00) (continued)
Offset Name Size Section/Page