SEC Lite Execution Units
MPC885 PowerQUICC Family Reference Manual, Rev. 2
48-10
Freescale Semiconductor
Figure 48-7. DEU Interrupt Control Register
0
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
31
Field ME
AE
OFE
IFE
—
IFO
OFU
—
KPE
IE
ERE CE
KSE DSE
—
Reset
0x0000_0000
R/W
R/W
Addr
DEU 0x05038
0
31
Field
Reserved
Reset
0x0000_0000
R/W
R/W
Addr
DEU 0x0503C
Table 48-6. DEU Interrupt Control Register Field Descriptions
Bits
Name
Description
0
ME
Mode Error. An illegal value was detected in the mode register.
0 Mode error enabled
1 Mode error disabled
1
AE
Address Error. An illegal read or write address was detected within the DEU
address space.
0 Address error enabled
1 Address error disabled
2
OFE
Output FIFO Error. The DEU output FIFO was detected non-empty upon write of
DEU data size register
0 Output FIFO non-empty error enabled
1 Output FIFO non-empty error disabled
3
IFE
Input FIFO Error. The DEU input FIFO was detected non-empty upon generation
of done interrupt
0 Input FIFO non-empty error enabled
1 Input FIFO non-empty error disabled
4
—
Reserved
5
IFO
Input FIFO Overflow. The DEU input FIFO has been pushed while full.
0 Input FIFO overflow error enabled
1 Input FIFO overflow error disabled
Note:
When operating as a master, the crypto-channel implements flow-control,
and FIFO size is not a limit to data input. When operated as a target, the
DEU cannot accept FIFO inputs larger than 512 bytes without overflowing.
6
OFU
Output FIFO Underflow. The DEU output FIFO has been read while empty.
0 Output FIFO underflow error enabled
1 Output FIFO underflow error disabled
7–9
—
Reserved
Summary of Contents for PowerQUICC MPC870
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