Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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External Signals
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor 12-7
WE0
BS_B0
IORD High B18 Output Write Enable 0—Output asserted when a write access to an
external slave controlled by the GPCM is initiated by the
MPC885. WE0 is asserted if D[0:7] contains valid data to be
stored by the slave device.
Byte Select 0 on UPMB—Output asserted under control of
UPMB, as programmed by the user. In a read or write transfer, the
line is only asserted if D[0:7] contains valid data.
I/O Device Read—Output asserted when the MPC885 starts a
read access to a region controlled by the PCMCIA interface.
Asserted only for accesses to a PC card I/O space.
WE1
BS_B1
IOWR High E16 Output Write Enable 1—Output asserted when the MPC885 initiates a
write access to an external slave controlled by the GPCM. WE1
is asserted if D[8:15] contains valid data to be stored by the slave
device.
Byte Select 1 on UPMB—Output asserted under control of
UPMB, as programmed by the user. In a read or write transfer, the
line is only asserted if D[8:15] contains valid data.
I/O Device Write—Output asserted when the MPC885 initiates a
write access to a region controlled by the PCMCIA interface.
IOWR is asserted only if the access is to a PC card I/O space.
WE2
BS_B2
PCOE High C17 Output Write Enable 2—Output asserted when the MPC885 starts a
write access to an external slave controlled by the GPCM. WE2
is asserted if D[16:23] contains valid data to be stored by the
slave device.
Byte Select 2 on UPMB—Output asserted under control of
UPMB, as programmed by the user. In a read or write transfer,
BS_B2 is asserted only if D[16:23] contains valid data.
PCMCIA Output Enable—Output asserted when the MPC885
initiates a read access to a memory region under the control of
the PCMCIA interface.
WE3
BS_B3
PCWE High B19 Output Write Enable 3—Output asserted when the MPC885 initiates a
write access to an external slave controlled by the GPCM. WE3
is asserted if D[24:31] contains valid data to be stored by the
slave device.
Byte Select 3 on UPMB—Output asserted under control of
UPMB, as programmed by the user. In a read or write transfer,
BS_B3 is asserted only if D[24:31] contains valid data.
PCMCIA Write Enable—Output asserted when the MPC885
initiates a write access to a memory region under control of the
PCMCIA interface.
BS_A[0:3] High D17, C18,
C19, F16
Output Byte Select 0 to 3 on UPMA—Outputs asserted under
requirement of UPMA, as programmed by the user. For read or
writes, asserted only if their corresponding data lanes contain
valid data:
BS_A0 for D[0:7], BS_A1 for D[8:15],
BS_A2 for D[16:23], BS_A3 for D[24:31]
Table 12-1. MPC885/MPC880 Signal Descriptions (continued)
Name
Hard
Reset
Number Type Description