Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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External Signals
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor 12-11
IP_B[0:1]
IWP[0:1]
VFLS[0:1] See
Table 12-3
A9, D9 Bidirectional Input Port B[0:1]—The MPC885 senses these inputs; their values
and changes are reported in the PIPR and PSCR of the PCMCIA
interface.
Instruction Watchpoint[0:1]—These outputs report the detection
of an instruction watchpoint in the program flow executed by the
core.
Visible History Buffer Flushes Status—The MPC885 outputs
VFLS[0:1] when program instruction flow tracking is required.
They report the number of instructions flushed from the history
buffer in the core.
IP_B2
IOIS16_B
AT2 Hi-Z C8 Bidirectional
three-state
Input Port B 2—The MPC885 senses this input; its value and
changes are reported in the PIPR and PSCR of the PCMCIA
interface.
I/O Device B is 16 Bits Port Size—The MPC885 monitors this
input when a PCMCIA interface transaction is initiated to an I/O
region in socket B in the PCMCIA space.
Address Type 2—The MPC885 drives this bidirectional
three-state signal when it initiates a transaction on the external
bus. If the core initiates the transaction, it indicates if the transfer
is instruction or data. This signal is not used for transactions
initiated by external masters.
IP_B3
IWP2
VF2 See
Table 12-3
C9 Bidirectional Input Port B 3—The MPC885 monitors this input; its value and
changes are reported in the PIPR and PSCR of the PCMCIA
interface.
Instruction Watchpoint 2—This output reports the detection of an
instruction watchpoint in the program flow executed by the core.
Visible Instruction Queue Flushes Status—The MPC885 outputs
VF2 with VF0/VF1 when instruction flow tracking is required. VF
n
reports the number of instructions flushed from the instruction
queue in the core.
IP_B4
LWP0
VF0 Hi-Z B9 Bidirectional Input Port B 4—The MPC885 monitors this input; its value and
changes are reported in the PIPR and PSCR of the PCMCIA
interface.
Load/Store Watchpoint 0—This output reports the detection of a
data watchpoint in the program flow executed by the core.
Visible Instruction Queue Flushes Status—The MPC885 outputs
VF0 with VF1/VF2 when instruction flow tracking is required. VF
n
reports the number of instructions flushed from the instruction
queue in the core.
IP_B5
LWP1
VF1 Hi-Z A10 Bidirectional Input Port B 5—The MPC885 monitors this input; its value and
changes are reported in the PIPR and PSCR of the PCMCIA
interface.
Load/Store Watchpoint 1—This output reports the detection of a
data watchpoint in the program flow executed by the core.
Visible Instruction Queue Flushes Status—The MPC885 outputs
VF1 with VF0 and VF2 when instruction flow tracking is required.
VF
n reports the number of instructions flushed from the
instruction queue in the core.
Table 12-1. MPC885/MPC880 Signal Descriptions (continued)
Name
Hard
Reset
Number Type Description