Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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ATM Exceptions
MPC885 PowerQUICC Family Reference Manual, Rev. 2
41-4 Freescale Semiconductor
41.2 Interrupt Queue Entry
Each entry in the ATM interrupt queue contains event information for a specific ATM channel. During
initialization, the host software should clear all queue entries and set the wrap bit (W) only for the last
entry. The format of an interrupt queue entry is shown in
Figure 41-4 .
12 IQOV Interrupt queue overflow. Set by the CP whenever an overflow condition in the interrupt queue
occurs. This condition occurs if the CP attempts to write a new interrupt entry into a valid entry (V =
1) not yet handled by the host.
13 GINT Global interrupt. Indicates that at least one new entry has been added to the interrupt queue. After
clearing the GINT event flag, the host begins processing the entries using the service pointer. The
host returns from the interrupt handler when it reaches an invalid queue entry (V = 0).
14 GUN Global transmitter underrun. Indicates that an underrun occurred in the SCC transmitter FIFO. A
GUN error is fatal because the affected channels are unknown. After GUN is set, the transmitter
stops data transmission from all channels and sets the APC disabled status flag APCST[DIS]. The
transmit line enters an idle state (logic high). After re-initializing the channels, the host may resume
transmission by issuing a
RESTART TRANSMIT
command (see Section 39.7, “ATM Commands” ) for
each channel.
For a faster recovery from a GUN error, re-initialize TSTATE by writing STFCR to the first byte (MSB
of the 32-bit value representing xSTATE), clearing the second byte, and leaving the third and fourth
(LSB of the 32 bit value representing xSTATE) bytes as is. Then the APC can be restarted by
clearing APCST[DIS]. This procedure results in corrupted transmit frames initially. (TSTATE should
normally be modified only during system initialization.)
Note: Clearing APCST[DIS] may be overwritten by the APC scheduling process; therefore, the user
should verify that APCST[DIS] has indeed been cleared after a minimum of 50 system clocks.
15 GOV Global receiver overrun. Indicates that an overrun occurred in the SCC receiver FIFO. A GOV error
is fatal because the affected channels are unknown. After GOV is set, the receiver stops receiving
data from all channels and halts all data transfers to memory. After re-initializing the channels the
host may resume receiving by issuing a
RESTART RECEIVE
command (see Section 39.7, “ATM
Commands” ) for each channel.
For a faster recovery from a GOV error, re-initialize RSTATE by writing SRFCR to the first byte (MSB
of the 32 bit value representing xSTATE), clearing the second byte, and leaving the third and fourth
(LSB of the 32 bit value representing xSTATE) bytes as is. This procedure initially results in
corrupted receive frames which should be disposed of by software. (RSTATE should normally be
modified only during system initialization.)
0 1 2 3 4 7 8 9 10 11 12 13 14 15 16 31
V W — CNG — APCO — TQF UN RXF BSY TXB RXB CHNUM_INDEX
Figure 41-4. Interrupt Queue Entry
Table 41-2. Serial ATM Event Register (SCCE) Field Descriptions (continued)
Bits Name Description