Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor 2-1
Chapter 2
Memory Map
Each memory resource in the MPC885 is mapped within a contiguous block of 16 Kbytes of memory. The
location of this block within the global 4-Gbyte physical memory space can be mapped on 64-Kbyte
resolution through an implementation-specific special-purpose register (SPR) called the
internal memory
map register (IMMR). See Section 10.4.1, “Internal Memory Map Register (IMMR).” Table 2-1 defines
the internal memory map, and Table 2-2 defines the internal security engine memory map.
Table 2-1. MPC885 Internal Memory Map (IMMR[14–15]=00)
Offset Name Size Section/Page
General System Interface Unit
000 SIUMCR—SIU module configuration register 32 bits 10.4.2/10-5
004 SYPCR—System protection control register 32 bits 10.4.3/10-7
008–00D Reserved 6 bytes —
00E SWSR—Software service register 16 bits 10.7.1/10-21
010 SIPEND—SIU interrupt pending register 32 bits 10.5.3/10-13
014 SIMASK—SIU interrupt mask register 32 bits 10.5.4.2/10-16
018 SIEL—SIU interrupt edge/level register 32 bits 10.5.4.3/10-17
01C SIVEC—SIU interrupt vector register 32 bits 10.5.4.4/10-17
020 TESR—Transfer error status register 32 bits 10.4.4/10-8
024–02F Reserved 12 bytes —
030 SDCR—SDMA configuration register 32 bits 19.2.1/19-4
034–07F Reserved 76 bytes —
PCMCIA
080 PBR0—PCMCIA interface base register 0 32 bits 16.4.5/16-14
084 POR0—PCMCIA interface option register 0 32 bits 16.4.5/16-14
088 PBR1—PCMCIA interface base register 1 32 bits 16.4.5/16-14
08C POR1—PCMCIA interface option register 1 32 bits 16.4.6/16-14
090 PBR2—PCMCIA interface base register 2 32 bits 16.4.5/16-14
094 POR2—PCMCIA interface option register 2 32 bits 16.4.6/16-14
098 PBR3—PCMCIA interface base register 3 32 bits 16.4.5/16-14
09C POR3—PCMCIA interface option register 3 32 bits 16.4.6/16-14