Freescale Semiconductor PowerQUICC MPC870, Reference Manual

Page: 1184 / 1426

SEC Lite Execution Units
MPC885 PowerQUICC Family Reference Manual, Rev. 2
48-8 Freescale Semiconductor
Figure 48-6. DEU Interrupt Status Register
Table 48-5 describes DEU Interrupt Register signals.
0 1 2 3 4 5 6 7 9 10 11 12 13 14 15 16 31
Field ME AE OFE IFE — IFO OFU — KPE IE ERE CE KSE DSE —
Reset 0x0000_0000
R/W R/W
Addr DEU 0x05030
0 31
Field Reserved
Reset 0x0000_0000
R/W R/W
Addr DEU 0x05034
Table 48-5. DEU Interrupt Status Register Field Descriptions
Bits Name Description
0 ME Mode error. An illegal value was detected in the mode register. Note: writing to reserved
bits in mode register is likely source of error.
0 No error detected
1 Mode error
1 AE Address error. An illegal read or write address was detected within the DEU address
space.
0 No error detected
1 Address error
2 OFE Output FIFO error. The DEU output FIFO was detected non-empty upon write of DEU data
size register.
0 No error detected
1 Output FIFO non-empty error
3 IFE Input FIFO error. The DEU input FIFO was detected non-empty upon generation of DONE
interrupt.
0 No error detected
1 Input FIFO non-empty error
4 — Reserved
5 IFO Input FIFO Overflow. The DEU input FIFO has been pushed while full.
0 No error detected
1 Input FIFO has overflowed
Note: When operating as a master, the crypto-channel implements flow-control, and the
FIFO size is not a limit to data input. When operated as a target, the DEU cannot
accept FIFO inputs larger than 512 bytes without overflowing.
6 OFU Output FIFO Underflow. The DEU output FIFO has been read while empty.
0 No error detected
1 Output FIFO has underflow error
7-9 — Reserved