Freescale Semiconductor PowerQUICC MPC870, Reference Manual

Page: 1207 / 1426

SEC Lite Execution Units
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor 48-31
Figure 48-23. AESU Interrupt Status Register
Table 48-5 describes AESU interrupt register fields.
0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 31
Field ME AE OFE IFE — IFO OFU --- IE ERE CE KSE DSE —
Reset 0x0000_0000
R/W R/W
Addr AESU 0x04030
0 31
Field Reserved
Reset 0x0000_0000
R/W R/W
Addr AESU 0x04034
Table 48-15. AESU Interrupt Status Register Field Descriptions
Bits Name Description
0 ME Mode Error. Indicates that invalid data was written to a register or a reserved mode bit was
set.
0 Valid Data
1 Reserved or invalid mode selected
1 AE Address Error. An illegal read or write address was detected within the AESU address
space.
0 No error detected
1 Address error
2 OFE Output FIFO Error. The AESU output FIFO was detected non-empty upon write of AESU
data size register.
0 No error detected
1 Output FIFO non-empty error
3 IFE Input FIFO Error. The AESU input FIFO was detected non-empty upon generation of done
interrupt.
0 No error detected
1 Input FIFO non-empty error
4 — Reserved
5 IFO Input FIFO Overflow. The AESU Input FIFO has been pushed while full.
0 No error detected
1 Input FIFO has overflowed
Note: When operating as a master, the crypto-channel implements flow-control, and the
FIFO size is not a limit to data input. When operated as a target, the AESU cannot
accept FIFO inputs larger than 512 Bytes without overflowing.
6 OFU Output FIFO Underflow. The AESU Output FIFO has been read while empty.
0 No error detected
1 Output FIFO has underflow error
7–10 — Reserved