Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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AAL2 Implementation
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor 44-3
For each CPS-Packet to be sent, the host prepares a TPD and adds it to the AAL2_Tx_Queue of the AAL2
channel. Similar to a TxBD, a TPD contains control information and the pointer to the CPS-Packet.
For each AAL2 channel, the CPM fills AAL0 buffers for transmission. Each AAL0 buffer consists of a
4-byte header and 48-byte payload. Ready AAL0 buffers packed with AAL2 data are transmitted (along
with other ATM channels) by the MPC885 according to the APC scheduling. Note that the ATM host
command
APC BYPASS
can also be used for direct scheduling of AAL2 channels.
For each AAL2 channel, the host must set the I bit in the associated AAL0 TxBDs in addition to the AAL2
bit in the associated AAL0 channel’s CT IMASK value so that after each cell transmission is completed,
the MPC885 attempts to generate an interrupt to the host. However, the interrupt does not reach the host
because the IMASK[AAL2] setting enables AAL2 handling for this buffer when the I bit in the TxBD is
set. This is the activation mechanism for AAL2 processing to attempt to pack ready CPS-Packets from the
channel’s AAL2_Tx_Queue into an available AAL0 buffer. Note that the first time AAL2 is activated, and
whenever the host or APC unit attempts to transmit a cell when the buffer is not ready, an idle cell is sent.
For each active AAL0 buffer, the AAL2 transmitter does the following:
• Copies the 4-byte cell header from the channel’s AAL2_TCT
• Generates the STF field of the CPS-PDU
• Fills the payload (CPS-PDU) with CPS-Packets
• If AAL2 can pack the whole CPS-Packet into the AAL0 buffer, it marks the TPD as available
(R=0). If TPD[INT] is set and the interrupt is not masked by AAL2_TCT[TPI], then an entry is
added to the exception queue (with the AAL2 bit and TXB bit set) to signal the host that this
CPS-Packet has been processed. The global interrupt count (INT_CNT) is also decremented. If
INT_CNT reaches zero, the global interrupt (GINT) bit in the event register is set and an interrupt
is generated to the host. (The INT_CNT is then restored to the INT_ICNT value.) If the exception
queue is already full, the IQOV bit is set in the event register—entries in the exception queue are
not overwritten. The host may then service the exception queue and process the appropriate
AAL2_Tx_Queues by filling available CPS-Packets and marking their TPDs as ready (R=1).
• If AAL2 cannot pack the whole CPS-Packet into the active buffer (because the AAL0 buffer
became full), the current CPS-Packet parameters are stored in the AAL2_TCT. The next time
AAL2 is activated to service this channel (to fill a new active AAL0 buffer), it resumes operation
from where it stopped.
• Generates the HEC field for each CPS-PH
• If the active buffer is filled with CPS-Packets, its TxBD[R] is set so that the AAL0 will process it
for actual transmission.
Note that the host application does not interface directly with the AAL0 buffers. The host interfaces with
the AAL2, which in turn interfaces with the AAL0 transfer mechanism of the MPC885.
AAL2 provides a built-in Timer CU mechanism which makes sure that CPS-Packets in partially filled
AAL0 buffers are not delayed more than a fixed time. The host can program the maximum delay for each
channel in the AAL2_TCT.
If there are not enough ready CPS-Packets in the AAL2_Tx_Queue of this channel to fill the (partially
filled) active buffer, the buffer’s parameters are temporarily stored in the AAL2_TCT. If the Timer CU