Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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MPC885 Instruction Set
MPC885 PowerQUICC Family Reference Manual, Rev. 2
5-12 Freescale Semiconductor
5.2.4.2.3 Integer Store Instructions
For integer store instructions, the contents of rS are stored into the byte, half word, word, or double word
in memory addressed by the effective address (EA). Many store instructions have an update form, in which
rA is updated with the EA. For these forms, the following rules apply:
• If rA
≠
0, the EA is placed into rA.
• If rS = rA, the contents of rS are copied to the target memory element, then the generated EA is
placed into rA (rS).
The MPC885 defines store with update instructions with rA = 0 and integer store instructions with the CR
update option enabled (Rc[31] = 1) to be invalid forms.
Table 5-8 lists integer store instructions for the
MPC885.
5.2.4.2.4 Integer Load and Store with Byte-Reverse Instructions
Table 5-9 describes integer load and store with byte-reverse instructions. When used in a system operating
with the default big-endian byte order, these instructions have the effect of loading and storing data in
little-endian order. Likewise, when used in a system operating with little-endian byte order, these
instructions have the effect of loading and storing data in big-endian order. For more information about
Load Word and Zero lwz r D,d( r A)
Load Word and Zero Indexed lwzx r D, r A, r B
Load Word and Zero with Update lwzu r D,d( r A)
Load Word and Zero with Update Indexed lwzux r D, r A, r B
Table 5-8. Integer Store Instructions
Name Mnemonic Syntax
Store Byte stb r S,d( r A)
Store Byte Indexed stbx r S, r A, r B
Store Byte with Update stbu r S,d( r A)
Store Byte with Update Indexed stbux r S, r A, r B
Store Half Word sth r S,d( r A)
Store Half Word Indexed sthx r S, r A, r B
Store Half Word with Update sthu r S,d( r A)
Store Half Word with Update Indexed sthux r S, r A, r B
Store Word stw r S,d( r A)
Store Word Indexed stwx r S, r A, r B
Store Word with Update stwu r S,d( r A)
Store Word with Update Indexed stwux r S, r A, r B
Table 5-7. Integer Load Instructions (continued)
Name Mnemonic Syntax