Freescale Semiconductor PowerQUICC MPC870, Reference Manual

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Byte Ordering
MPC885 PowerQUICC Family Reference Manual, Rev. 2
A-4 Freescale Semiconductor
A.4.1 TLE Mode System Examples
The following tables describe how to handle the little-endian program or data in the little-endian system
that is built around the MPC885 for various port sizes.
Table A-3. Little-Endian Program/Data Path Between the Register and 32-Bit Memory
Fetch/
Load
Store
Type
Little-
Endian
Addr
U-bus
and
Cache
Addr
External
Bus
Addr
Data in the
Register
U-bus and
Cache Format
External Bus
Format
Little-Endian
Program/Data
M
S
B
L
S
B
0 1 2 3 0 1 2 3 3 2 1 0
Word 0 0 0 11 12 13 14 11 12 13 14 14 13 12 11 11 12 13 14
Half word 0 2 0 21 22 21 22 22 21 21 22
Half word 2 0 2 31 32 31 32 32 31 31 32
Byte 0 3 0 ‘a’ ‘a’ ‘a’ ‘a’
Byte 1 2 1 ‘b’ ‘b’ ‘b’ ‘b’
Byte 2 1 2 ‘c’ ‘c’ ‘c’ ‘c’
Byte 3 0 3 ‘d’ ‘d’ ‘d’ ‘d’
Table A-4. Little-Endian Program/Data Path Between the Register and 16-Bit Memory
Fetch/
Load
Store
Type
Little-
Endian
Addr
U-bus
and
Cache
Addr
External
Bus
Addr
Data in the
Register
U-bus and
Cache format
External Bus
Format
Little-Endian
Program/Data
M
S
B
L
S
B
0 1 2 3 0 1 2 3 3 2 1 0
Word 0 0 0 11 12 13 14 11 12 13 14 14 13 13 14
2 12 11 11 12
Half word 0 2 0 21 22 21 22 22 21 21 22
Half word 2 0 2 31 32 31 32 32 31 31 32
Byte 0 3 0 ‘a’ ‘a’ ‘a’ ‘a’
Byte 1 2 1 ‘b’ ‘b’ ‘b’ ‘b’
Byte 2 1 2 ‘c’ ‘c’ ‘c’ ‘c’
Byte 3 0 3 ‘d’ ‘d’ ‘d’ ‘d’