Samsung S5PC110, Manual

Page: 1412 / 2426

S5PC110_UM 6 5BMULTI FORMAT CODEC
6-20
6.3.2.1.9 RISC2HOST Argument Registers (MFC_RISC2HOST_ARG1, R/W, Address = 0xF170_0048)
MFC_RISC2HOST_ARG1 Bit Description Initial State
MFC_RISC2HOST_ARG1 [31:0] <OPEN>
An instance ID will be returned
<SYS_INIT>
Firmware memory size will be returned(currently
300KB)
<SEQ_START, FRAME_START, LAST_SEQ,
INIT_BUFFERS, FRAME_START_REALLOC>
A channel ID will be returned
<FLUSH_COMMAND>
[31:16]: Instance ID of CH1
[15:0]: Instance ID of CH0
0
NOTE:
When host receives FLUSH_COMMAND_RET, it should check the shared memory at 0x80. 0x8C to figure out the
input and output pointers in each command channel. If [31:16] is not 0xFFFF, a command in CH1 has been flushed.
If [15:0] is not 0xFFFF, a command in CH0 has been flushed.
6.3.2.1.10 RISC2HOST Argument Registers (MFC_RISC2HOST_ARG2, R/W, Address = 0xF170_004C)
MFC_RISC2HOST_ARG2 Bit Description Initial State
DISP_ERROR_STATUS [31:16] Error status for the displayed frame.
Error codes are defined in 0
0
DEC_ERROR_STATUS [15:0] Error status for the decoded/encoded frame.
Error codes are defined in 0
0
6.3.2.1.11 RISC2HOST Argument Registers (MFC_RISC2HOST_ARG3, R/W, Address = 0xF170_0050)
MFC_RISC2HOST_ARG3 Bit Description Initial State
MFC_RISC2HOST_ARG3 [31:0] <CONTINUE_ENC>
The size of the output stream
0
6.3.2.1.12 RISC2HOST Argument Registers (MFC_RISC2HOST_ARG4, R/W, Address = 0xF170_0054)
MFC_RISC2HOST_ARG4 Bit Description Initial State
MFC_RISC2HOST_ARG4 [31:0] Reserved 0