S5PC110_UM
5 PCM AUDIO INTERFACE
5-15
5.6.1.7 PCM FIFO Status Register (PCM_FIFO_STAT)
The PCM_FIFO_STAT register is used to report FIFO status.
•
PCM_FIFO_STAT, R, Address = 0xE230_0018
•
PCM_FIFO_STAT, R, Address = 0xE120_0018
•
PCM_FIFO_STAT, R, Address = 0xE2B0_0018
The bit definitions for the PCM_IRQ_STATUS Register are described below:
PCM_FIFO_STAT
Bit
Description
Initial State
Reserved [31:20]
Reserved
0
TXFIFO_COUNT
[19:14] TXFIFO data count (0~32).
0
TXFIFO_EMPTY [13]
To
indicate whether TXFIFO is empty.
0
TXFIFO_ALMOST_EMPTY [12]
To
indicate
whether TXFIFO is almost empty.
0
TXFIFO_FULL
[11]
To indicate whether TXFIFO is full.
0
TXFIFO_ALMOST_FULL [10]
To
indicate whether TXFIFO is almost full.
0
RXFIFO_COUNT
[9:4]
RXFIFO data count (0~32).
0
RXFIFO_EMPTY
[3]
To indicate whether RXFIFO is empty.
0
RXFIFO_ALMOST_EMPTY
[2]
To indicate whether RXFIFO is almost empty.
0
RX_FIFO_FULL
[1]
To indicate whether RXFIFO is full.
0
RX_FIFO_ALMOST_FULL
[0]
To indicate whether RXFIFO is almost full.
0
5.6.1.8 PCM Interrupt Clear Register (PCM_CLRINT)
The PCM_CLRINT register is used to clear the interrupt. Interrupt service routine is responsible for clearing
interrupt asserted. Writing any values on this register clears interrupts for both ARM and DSP. Reading this
register is not allowed. Clearing interrupt must be prior to resolving the interrupt condition; else, another interrupt
that would occur after this interrupt may be ignored.
•
PCM_CLRINT, W, Address = 0xE230_0020
•
PCM_CLRINT, W, Address = 0xE120_0020
•
PCM_CLRINT, W, Address = 0xE2B0_0020
Summary of Contents for S5PC110
Page 4: ...Section 1 OVERVIEW ...
Page 28: ...Section 2 SYSTEM ...
Page 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Page 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Page 474: ...Section 3 BUS ...
Page 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Page 506: ...Section 4 INTERRUPT ...
Page 537: ...Section 5 MEMORY ...
Page 540: ......
Page 703: ...Section 6 DMA ...
Page 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Page 737: ...Section 7 TIMER ...
Page 795: ...Section 8 CONNECTIVITY STORAGE ...
Page 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Page 1100: ...Section 9 MULTIMEDIA ...
Page 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Page 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Page 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Page 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Page 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Page 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Page 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Page 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Page 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Page 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Page 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Page 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Page 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Page 1798: ...Section 10 AUDIO ETC ...
Page 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Page 1951: ...Section 11 SECURITY ...
Page 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Page 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Page 2005: ...Section 12 ETC ...
Page 2039: ...Section 13 SIZE BALL MAP ...