Samsung S5PC110, Manual

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S5PC110_UM 4 NAND FLASH CONTROLLER
4-4
4.3 SOFTWARE MODE
S5PC110 supports only software mode access. Use this mode to access NAND flash memory. The NAND flash
controller supports direct access to interface with the NAND flash memory.
•
Writing to the command register (NFCMMD) specifies the NAND Flash Memory command cycle
•
Writing to the address register (NFADDR) specifies the NAND Flash Memory address cycle
•
Writing to the data register (NFDATA) specifies write data to the NAND Flash Memory (write cycle)
•
Reading from the data register (NFDATA) specifies read data from the NAND Flash Memory (read cycle)
•
Reading main ECC registers (NFMECCD0/NFMECCD1) and Spare ECC registers (NFSECCD) specify read
data from the NAND Flash Memory
NOTE:
In the software mode, use polling or interrupt to check the RnB status input pin.
4.3.1 DATA REGISTER CONFIGURATION
4.3.1.1 8-bit NAND Flash Memory Interface
•
A. Word Access
Register Endian Bit [31:24] Bit [23:16] Bit [15:8] Bit [7:0]
NFDATA Little
4
th
I/O[ 7:0] 3
rd
I/O[ 7:0] 2
nd
I/O[ 7:0]
1st
I/O[ 7:0]
•
B. Half-word Access
Register Endian Bit [31:24] Bit [23:16] Bit [15:8] Bit [7:0]
NFDATA Little
Invalid value Invalid value
2
nd
I/O[ 7:0] 1
st
I/O[ 7:0]
•
C. Byte Access
Register Endian Bit [31:24] Bit [23:16] Bit [15:8] Bit [7:0]
NFDATA Little
Invalid value Invalid value Invalid value 1
st
I/O[ 7:0]