Samsung S5PC110, Manual

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S5PC110_UM 2 CORESIGHT
2-7
2.2 DEBUG ACCESS PORT
2.2.1 ABOUT DEBUG ACCESS PORT
The Debug Access Port (DAP) is an implementation of ARM Debug Interface version 5 (ADIv5) comprising a
number of components supplied in a single configuration. All the supplied components fit into the various
architectural components for Debug Ports (DPs), which are used to access the DAP from an external debugger
and Access Ports (APs), to access on-chip system resources.
The debug port and access ports together are referred to as DAP.
The DAP provides real-time access to the debugger without halting the core to:
• AMBA system memory and peripheral registers
• All debug configuration registers.
The DAP also provides debugger access to JTAG scan chains of system components, for example non-CoreSight
compliant processors.
Figure 2-4
shows the top-level view of the functional blocks of the DAP.
The DAP enables debug access to the complete SoC using a number of master ports.
Access to the CoreSight Debug Advanced Peripheral Bus (APB) is enabled through the APB Access Port (APB-
AP) and APB Multiplexer (APB-MUX), and system access through the Advanced High-performance Bus Access
Port (AHB-AP).
The DAP comprises of following interface blocks:
• External debug access using the JTAG Debug Port.
− External JTAG access using the JTAG Debug Port (JTAG-DP).
• System access using:
− AHB-AP
− APB-AP
− JTAG-AP
− DAPBUS exported interface.
• An APB multiplexer enables system access to CoreSight components connected to the Debug APB.
• The ROM table provides a list of memory locations of CoreSight components connected to the Debug APB.
This is visible from both tools and system access.
There are three access ports supplied in the DAP, and it is possible to connect a fourth access port externally.
The supplied access ports within this release are:
• AHB-AP for connection to the main system bus
• APB-AP to enable direct connection to the dedicated Debug Bus
• JTAG-AP to control up to eight scan chains.