Samsung S5PC110, Manual

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S5PC110_UM 3 ONENAND CONTROLLER
3-3
3.4 FUNCTIONAL DESCRIPTION OF ONENAND
By default, the ARM processor directly accesses OneNAND. In addition, internal DMA engine can access
OneNAND. For example, the internal DMA engine transfers data between OneNAND DataRAM and system main
memory (like DRAM) without wasting the processing power of ARM processor. These additional hardware
resources can be utilized to maximize the performance and minimize the usage of ARM processor for OneNAND
read/ write/ copy operation.
3.4.1 BLOCK DIAGRAM OF ONEENAND CONTROLLER
Figure 3-1
shows the block diagram of OneNAND controller that comprises one AHB slave port (A), one AHB
master port (B), and one OneNAND interface port (C).
Figure 3-1 OneNAND Controller Block Diagram
(A: AHB Slave Port, B: AHB Master Port, and C: OneNAND Interface Port)