Samsung S5PC110, Manual

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S5PC110_UM 5 COMPACT FLASH CONTROLLER
5-21
5.11.2.4 ATA Configuration Register (ATA_CFG, R/W, Address = 0xE820_0018)
ATA_CFG Bit Description R/W Initial State
Reserved [31] Reserved (This field should be 0x1) R/W 0x1
Reserved [30:13] Reserved R 0x0
dma_mode [12] Determines whether DMA is normal DMA
0 = Normal DMA mode
1 = Reserved. R/W 0x0
Reserved [11] Reserved R
word_swap [10] Determines whether endian is little or big in AHB word
data. (half word swapping)
0 = Little endian {byte3, byte2, byte1, byte0}
1 = Big endian {byte1, byte0, byte3, byte2} R/W 0x0
udma_auto_mode [9] Determines whether to continue automatically in case of
early termination in UDMA mode by Device. This bit shoud
not be changed during runtime operation.
0 = Stay in pause state and wait for CPU's action.
1 = Continue automatically R/W 0x0
Reserved [8] Reserved R 0x0
Reserved [7] Reserved R 0x0
byte_swap [6] Determines whether data endian is little or big in 16-bit
data.
0 = Little endian ( data[15:8], data[7:0] )
1 = Big endian ( data[7:0], data[15:8] )
In case of PIO mode;
0 = Big endian
1 = Little endian. R/W 0x0
atadev_irq_al [5] Device interrupt signal level
0 = Active high
1 = Active low R/W 0x0
dma_dir [4] DMA transfer direction
0 = Host read data from device
1 = Host write data to device R/W 0x0
ata_class [3:2] Selects ATA transfer class
2’b00 = Transfer class is PIO
2’b01 = Transfer class is PIO DMA
2’b10 = Transfer class is Multi-word DMA
2’b11 = Transfer class is UDMA
R/W 0x0
ata_iordy_en [1] Determines whether IORDY input extends data transfer.
0 = Disables IORDY ( ignored )
1 = Enables IORDY ( can extend )
R/W 0x0
ata_rst [0] ATAPI device reset by this host.
0 = No reset
1 = Reset R/W 0x0