Samsung S5PC110, Manual

Page: 1334 / 2426

S5PC110_UM 2 1BCAMERA INTERFACE
2-87
2.8.2.33 Miscellaneous Register (CMISCn)
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CMISC0, R/W, Address = 0xFB20_0198
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CMISC1, R/W, Address = 0xFB30_0198
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CMISC2, R/W, Address = 0xFB40_0198
CMISCn Bit Description Initial State
Reserved [31:2] - 0
SEL_CORE_CLO
CK [1] Specifies Clock source selection for CAMIF core block.
0 : Bus clock
1 : Special clock for local path operation between CAMIF and
Display Controller.
(ML=OO) 0
Reserved [0] - 0
2.8.2.34 Key Detect Register (CIKEYn)
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CIKEY0, R/W, Address = 0xFB20_019C
•
CIKEY1, R/W, Address = 0xFB30_019C
•
CIKEY2, R/W, Address = 0xFB40_019C
CIKEYn Bit Description Initial State
KEY_DETECT [31] Specifies KEY detect for graphic layer scaling.
1 = KEY detect ON
0 = OFF (Normal)
(ML=OO) 0
Reserved [30:28] - 0
R_KEY [27:20] Specifies ‘R’ of the RGB region key value.
(ML=OO)
0
Reserved [19:18] - 0
G_KEY [17:10] Specifies ‘G’ of the RGB region key value.
(ML=OO) 0
Reserved [9:8] - 0
B_KEY [7:0] Specifies ‘B’ of the RGB region key value.
(ML=OO) 0