S5PC110_UM
1 VECTORED INTERRUPT CONTROLLER
1-27
1.4.1.28 Protection Register
(TZICProtection, R/W, Address=0xF280_0018, 0xF290_0018, 0xF2A0_0018, 0xF2B0_0018)
TZICProtection
Bit
Description
Initial State
-
[31:1] Read undefined. Write as 0.
0x0
Protection
[0]
Enables or disables protected register access:
0 = Disables Protection mode
1 = Enables Protection mode.
If enabled, you can only make privileged mode access
(reads and writes) to the TZIC. This register is accessed in
privileged mode, even if protection mode is disabled.
0x0
1.4.1.29 Lock Enable Register (TZICLock, W, Address=0xF280_001C, 0xF290_001C, 0xF2A0_001C,
0xF2B0_001C)
TZICLock
Bit
Description
Initial State
Lock
[31:0] To enable access to the other registers in the TZIC, you
must write the correct access code of 0x0ACCE550 to this
register. To disable access to the other TZIC registers, you
must write any other value except 0x0ACCE550 to this
register.
-
1.4.1.30 Lock Status Register
(TZICLockStatus, R, Address=0xF280_0020, 0xF290_0020, 0xF2A0_0020, 0xF2B0_0020)
TZICLockStatus
Bit
Description
Initial State
- [31:1]
Read
undefined.
0x0
Locked
[0]
Shows the locked status of the TZIC:
0 = Access to the TZIC is not locked
1 = Access to the TZIC is locked
Use TZICLock Register to unlock the access
0x1
1.4.1.31 Peripheral Identification Register
(TZICPeriphID0, R, Address=0xF280_0FE0, 0xF290_0FE0, 0xF2A0_0FE0, 0xF2B0_0FE0)
TZICPeriphID0
Bit
Description
Initial State
- [31:8]
Read
undefined
0x0
Partnumber0
[7:0] These bits read back as 0x90
0x90
Summary of Contents for S5PC110
Page 4: ...Section 1 OVERVIEW ...
Page 28: ...Section 2 SYSTEM ...
Page 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Page 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Page 474: ...Section 3 BUS ...
Page 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Page 506: ...Section 4 INTERRUPT ...
Page 537: ...Section 5 MEMORY ...
Page 540: ......
Page 703: ...Section 6 DMA ...
Page 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Page 737: ...Section 7 TIMER ...
Page 795: ...Section 8 CONNECTIVITY STORAGE ...
Page 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Page 1100: ...Section 9 MULTIMEDIA ...
Page 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Page 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Page 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Page 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Page 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Page 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Page 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Page 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Page 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Page 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Page 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Page 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Page 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Page 1798: ...Section 10 AUDIO ETC ...
Page 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Page 1951: ...Section 11 SECURITY ...
Page 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Page 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Page 2005: ...Section 12 ETC ...
Page 2039: ...Section 13 SIZE BALL MAP ...