S5PC110_UM
8 TRANSPORT STREAM INTERFACE
8-24
8.2.2.10 TSI PID Filter0 Address Register (TS_PID0, R/W, Address = 0xEB40_0024)
TS_PID0
Bit
Description
R/W
Initial State
Reserved [31:14]
-
-
-
pid0_en
[13]
Specifies the PID filter0.
0 = Disable
1 = Enable
R/W 1’b0
pid0_value
[12:0]
Specifies the PID0 value. If an input stream's PID is
different from this value, then the stream is ignored.
R/W 13’h0
8.2.2.11 TSI PID Filter1 Address Register (TS_PID1, R/W, Address = 0xEB40_0028)
8.2.2.12 TSI PID Filter2 Address Register (TS_PID2, R/W, Address = 0xEB40_002C)
8.2.2.13 TSI PID Filter3 Address Register (TS_PID3, R/W, Address = 0xEB40_0030)
8.2.2.14 TSI PID Filter4 Address Register (TS_PID4, R/W, Address = 0xEB40_0034)
8.2.2.15 TSI PID Filter5 Address Register (TS_PID5, R/W, Address = 0xEB40_0038)
8.2.2.16 TSI PID Filter6 Address Register (TS_PID6, R/W, Address = 0xEB40_003C)
8.2.2.17 TSI PID Filter7 Address Register (TS_PID7, R/W, Address = 0xEB40_0040)
8.2.2.18 TSI PID Filter8 Address Register (TS_PID8, R/W, Address = 0xEB40_0044)
8.2.2.19 TSI PID Filter9 Address Register (TS_PID9, R/W, Address = 0xEB40_0048)
8.2.2.20 TSI PID Filter10 Address Register (TS_PID10, R/W, Address = 0xEB40_004C)
8.2.2.21 TSI PID Filter11 Address Register (TS_PID11, R/W, Address = 0xEB40_0050)
8.2.2.22 TSI PID Filter12 Address Register (TS_PID12, R/W, Address = 0xEB40_0054)
Summary of Contents for S5PC110
Page 4: ...Section 1 OVERVIEW ...
Page 28: ...Section 2 SYSTEM ...
Page 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Page 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Page 474: ...Section 3 BUS ...
Page 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Page 506: ...Section 4 INTERRUPT ...
Page 537: ...Section 5 MEMORY ...
Page 540: ......
Page 703: ...Section 6 DMA ...
Page 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Page 737: ...Section 7 TIMER ...
Page 795: ...Section 8 CONNECTIVITY STORAGE ...
Page 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Page 1100: ...Section 9 MULTIMEDIA ...
Page 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Page 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Page 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Page 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Page 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Page 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Page 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Page 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Page 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Page 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Page 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Page 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Page 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Page 1798: ...Section 10 AUDIO ETC ...
Page 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Page 1951: ...Section 11 SECURITY ...
Page 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Page 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Page 2005: ...Section 12 ETC ...
Page 2039: ...Section 13 SIZE BALL MAP ...