Samsung S5PC110, Manual

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S5PC110_UM 1 VECTORED INTERRUPT CONTROLLER
1-22
1.4.1.8 Software Interrupt Clear Register
(VICSOFTINTCLEAR, W, Address=0xF200_001C, 0xF210_001C, 0xF220_001C, 0xF230_001C)
VICSOFTINTCLEAR Bit Description Initial State
SoftIntClear [31:0] Clears corresponding bits in the VICSOFTINT Register:
0 = No effect
1 = Disables Software interrupt in the VICSOFTINT Register.
There is one bit of the register for each interrupt source.
-
1.4.1.9 Protection Enable Register
(VICPROTECTION, R/W, Address=0xF200_0020, 0xF210_0020, 0xF220_0020, 0xF230_0020)
VICPROTECTION Bit Description Initial State
Reserved [31:1] Reserved, read as 0, do not modify. 0x0
Protection [0] Enables or disables protected register access:
0 = Disables Protection mode
1 = Enables Protection mode.
If enabled, only privileged mode accesses (reads and writes)
can access the interrupt controller registers, that is, if
HPROT[1] is set HIGH for the current transfer.
If disabled, both user mode and privileged mode can access
the registers.
This register can only be accessed in privileged mode, even if
protection mode is disabled.
0x0
1.4.1.10 Vector Address Register
(VICADDRESS, R/W, Address=0xF200_0F00, 0xF210_0F00, 0xF220_0F00, 0xF230_0F00)
VICADDRESS Bit Description Initial State
VectAddr [31:0] Contains the address of the currently active ISR, with reset
value 0x00000000.
A read of this register returns the address of the ISR and sets
the current interrupt as being serviced. A read must be
performed while there is an active interrupt.
A write of any value to this register clears the current interrupt.
A write must only be performed at the end of an interrupt
service routine.
0x00000000