Samsung S5PC110, Manual

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S5PC110_UM 7 SD/MMC CONTROLLER
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7.10.23 ADMA SYSTEM ADDRESS REGISTER
7.10.23.1 ADMA System Address Register
•
ADMASYSADDR0, R/W, Address = 0xEB00_0058
•
ADMASYSADDR1, R/W, Address = 0xEB10_0058
•
ADMASYSADDR2, R/W, Address = 0xEB20_0058
•
ADMASYSADDR3, R/W, Address = 0xEB30_0058
This register contains the physical Descriptor address used for ADMA data transfer.
ADMASYSADDR Bit Description Initial State
ADMASYSAD [31:0] ADMA System Address
This register holds byte address of executing command of the
Descriptor table.
32-bit Address Descriptor uses lower 32-bit of this register. At the
start of ADMA, the Host Driver sets start address of the
Descriptor table. The ADMA increments this register address,
which points to next line, if having fetched a Descriptor line. If the
ADMA Error Interrupt is generated, this register holds valid
Descriptor address depending on the ADMA state. The Host
Driver programs Descriptor Table on 32-bit boundary and set 32-
bit boundary address to this register. ADMA2 ignores lower 2-bit
of this register and assumes it to be 00b.
32-bit Address ADMA
Register Value 32-bit System Address
xxxxxxxx 00000000h 00000000h
xxxxxxxx 00000004h 00000004h
xxxxxxxx 00000008h 00000008h
xxxxxxxx 0000000Ch 0000000Ch
…… ……
xxxxxxxx FFFFFFFCh FFFFFFFCh
Note: The data length of the ADMA Descriptor Table should be
the word unit (multiple of the 4-byte).
00