Samsung S5PC110, Manual

Page: 1024 / 2426

S5PC110_UM 7 SD/MMC CONTROLLER
7-44
7.10 RESPONSE REGISTER
This register is used to store responses from SD cards.
•
Response Register 0 (Channel 0) (RSPREG0_0, ROC, Address = 0xEB00_0010)
•
Response Register 1 (Channel 0) (RSPREG1_0, ROC, Address = 0xEB00_0014)
•
Response Register 2 (Channel 0) (RSPREG2_0, ROC, Address = 0xEB00_0018)
•
Response Register 3 (Channel 0) (RSPREG3_0, ROC, Address = 0xEB00_001C)
•
Response Register 0 (Channel 1) (RSPREG0_1, ROC, Address = 0xEB10_0010)
•
Response Register 1 (Channel 1) (RSPREG1_1, ROC, Address = 0xEB10_0014)
•
Response Register 2 (Channel 1) (RSPREG2_1, ROC, Address = 0xEB10_0018)
•
Response Register 3 (Channel 1) (RSPREG3_1, ROC, Address = 0xEB10_001C)
•
Response Register 0 (Channel 2) (RSPREG0_2, ROC, Address = 0xEB20_0010)
•
Response Register 1 (Channel 2) (RSPREG1_2, ROC, Address = 0xEB20_0014)
•
Response Register 2 (Channel 2) (RSPREG2_2, ROC, Address = 0xEB20_0018)
•
Response Register 3 (Channel 2) (RSPREG3_2, ROC, Address = 0xEB20_001C)
•
Response Register 0 (Channel 3) (RSPREG0_3, ROC, Address = 0xEB30_0010)
•
Response Register 1 (Channel 3) (RSPREG1_3, ROC, Address = 0xEB30_0014)
•
Response Register 2 (Channel 3) (RSPREG2_3, ROC, Address = 0xEB30_0018)
•
Response Register 3 (Channel 3) (RSPREG3_3, ROC, Address = 0xEB30_001C)
RSPREG Bit Description Initial State
CMDRSP [127:0] Command Response
The Table below describes the mapping of command responses
from the SD Bus to this register for each response type. In the
table, R[] refers to a bit range within the response data as
transmitted on the SD Bus, REP[] refers to a bit range within the
Response register.
128-bit Response bit order : {RSPREG3, RSPREG2, RSPREG1,
RSPREG0}