Samsung S5PC110, Manual

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S5PC110_UM 3 CLOCK CONTROLLER
3-59
3.7.10.7 IEM Control SFRs (FREQ_CPU, R/W, Address = 0xE010_3060)
FREQ_CPU Bit Description Initial State
Reserved [31:24] Reserved 0x00
FREQ_CPU [23:0] Maximum frequency of CPU in kHz 0x00_0000
The register is related to IECCFGFREQCPU[23:0] of IEM_IEC input port. FREQ_CPU[23:0] is the maximum
processor of frequency in KHz, and gives the clock frequency of the processor in KHz. Examples values are
shown in the following table.
FREQ_CPU[23:0] Verilog Expression Processor Frequency
0x00_4E20 24’MSYS20_000 200,000KHz = 20MHz
0x03_A980 24’PSYS40_000 240,000KHz = 240MHz
0x00_03E8 24’MSYS01_000 1,000KHz = 1MHz
3.7.10.8 IEM Control SFRs (FREQ_DPM, R/W, Address = 0xE010_3064)
FREQ_DPM Bit Description Initial State
Reserved [31:24] Reserved 0x00
FREQ_DPM [23:0] Maximum frequency of DPM accumulators 0x00_0000
The register is related to IECCFGFREQDPM[23:0] of IEM_IEC input port. FREQ_DPM[23:0] is the DPM
frequency in KHz, and gives the rate that the DPM is accumulating in KHz. Examples values are shown in the
following table.
FREQ_DPM[23:0] Verilog Expression Processor Frequency
0x00_4E20 24’MSYS20_000 200,000KHz = 20MHz
0x00_2710 24’MSYS10_000 100,000KHz = 10MHz
0x00_03E8 24’MSYS01_000 1,000KHz = 1MHz