Samsung S5PC110, Manual

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S5PC110_UM 5 COMPACT FLASH CONTROLLER
5-18
5.11.2 ATA COMMAND REGISTER (ATA_COMMAND, R/W, ADDRESS = 0XE820_0008)
ATA_COMMAND Bit Description R/W Initial State
Reserved [31:2] Reserved R 0x0
xfr_command [1:0] ATA transfer command
Four command types (START, STOP, ABORT and
CONTINUE) are supported for data transfer control. The
“START” command starts data transfer. The “STOP”
command pause transfer temporarily. The “CONTINUE”
command is used after “STOP” command or internal
state of “pause” if track buffer is full or UDMA hold state.
The “ABORT” command terminates current data transfer
sequences and make ATA host controller move to idle
state.
00 = Stop command
01 = Start command (Available in idle state)
10 = Abort command
11 = Continue command (Available in transfer pause)
** After CPU ABORT commands, make a software reset
by ATA_SWRST to clear the leftover values of internal
registers. R/W 0x0
The STOP command controls the ATA Device side signal but does not control DMA side. Namely, if the FIFO has
data after STOP command, DMA operation progresses until the FIFO becomes empty at read operation. In case
of write operation, the DMA acts similarly until the FIFO becomes full.
Use the ABORT command if the transmitting data has proven useless data or discontinues absurd state by error
interrupt from device. At that time, it clears all data in ATA Host controller (register, FIFO) and the transmission
state machine goes to IDLE.