Samsung S5PC110, Manual

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S5PC110_UM 3 ONENAND CONTROLLER
3-1
3
ONENAND CONTROLLER
3.1 OVERVIEW OF ONENAND CONTROLLER
S5PC110 supports external 16-bit bus for OneNAND and Flex-OneNAND memory devices. The OneNAND
controller supports asynchronous and synchronous read/ write bus operations. It also integrates its own dedicated
DMA engine to accelerate the operations of OneNAND memory device.
3.2 KEY FEATURES OF ONENAND CONTROLLER
The key features of OneNAND controller include:
•
Supports data buffering (32-entry read prefetch FIFO and 32-entry posted write FIFO) where necessary, to
achieve maximum performance.
•
Supports asynchronous FIFOs for matching speed between OneNAND flash memory and AHB system bus
interface.
•
Supports both asynchronous and synchronous read/ write of the OneNAND flash memory device.
•
Programmable burst transfer size of the OneNAND flash memory interface (4, 8, 16, 32, 1024 and
continuous).
•
Supports 16-bit data path to memory and 32-bit data path to the AHB system bus interface.
•
Supports multiple memory devices in the OneNAND family (OneNAND and Flex-OneNAND) with a single bus
interface protocol.
•
Supports up to two OneNAND devices. All the chip selects are available by default.
•
Supports the warm reset function of the OneNAND device.
The advanced features of OneNAND controller include:
•
Supports internal dedicated DMA engine to maximize the data transfer speed between OneNAND flash and
system memory.