Samsung S5PC110, Manual

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S5PC110_UM 5 INTELLIGENT ENERGY MANAGEMENT
5-8
5.2.1.4 Power Management Unit
The Power Management Unit (PMU) in S5PC110X supports IEM features. The PMU provides configuration
information to IEC, for example:
•
Fractional index map, indicating the fractional levels supported
•
Performance map, providing the mapping of the performance levels onto the clock frequencies supported by
the CMU
•
Maximum processor performance.
5.2.1.5 Clock Management Unit
In S5PC110X, Clock Management Unit (CMU) in System Controller supports Dynamic Clock Generation.
The CMU receives target performance requests from the IEC, via Power Management Unit (PMU). It generates
the necessary clocks for the CPU, for example:
•
Processor clock
•
Peripheral clocks
•
AMBA clock.
Additionally, for a more efficient design, the CMU must be capable to generate the different performance levels as
indicated by the IEC. The CMU can also be a memory mapped AMBA peripheral and can contain both control and
status registers.
The design of the CMU must meet the requirements set by the IEC and the Advanced Power Controller (APC1).
These constraints are necessary to ensure optimum and correct performance of the Hardware Performance
Monitor (HPM).
5.2.1.6 Power Supply Unit Supporting Dynamic Voltage Scaling
The Power Supply Unit (PSU) is the only off-chip component. The PSU provides the requested voltage to the
SoC. It interfaces to the DVC through an interface such as the PWI. It ensures that the voltage targets specified by
the DVC are provided to the SoC.