S5PC110_UM
6 BOOTING SEQUENCE
6-3
6.2 SCENARIO DESCRIPTION
6.2.1 RESET STATUS
There are several scenarios for system reset such as hardware reset, watchdog reset, software reset, and wake
up from power down modes. For each scenario, the mandatory functions are summarized in
Table 6-1 Functions Needed for Various Reset Status
Basic
Initialization
in iROM
PLL Setting
in iROM
First Boot /
Second Boot
Loader
Loading
DRAM Setting
in Second
Boot Loader
OS
Loading
Restore
Previous
State
Hardware Reset
O
O
O
O
O
X
Watchdog Reset
O
O
O
O
O
X
Wake up from
SLEEP
O O O O
X O
SW reset
O
O
O
O
O
X
Wake up from
DEEP_STOP
O X
X
(note)
X
X
O
Wake up from
DEEP_IDLE
O X
X
(note)
X
X
O
NOTE:
When the contents of SRAM are preserved by retention option.
At the time of hardware reset and watchdog reset, the system should boot fully with the first boot loader and the
second boot loader and loading of OS image. The new reset status is classified as reset group0.
Since the contents of DRAM memory are preserved in the SLEEP mode, it does not require loading the OS image
to DRAM. However, SoC internal power is not supplied to internal logic during SLEEP mode and all contents in
internal SRAM are not preserved. Therefore, the first boot loader and the second boot loader should be loaded
again. This reset status is classified as reset group1.
At the time of software reset, The loading of boot loader is executed. Although top block’s power is gated in
DEEP_STOP and DEEP_IDLE modes, the internal SRAM can be reserved, so that the re-loading of boot loader is
not required. In case of non-retention of SRAM in DEEP_STOP and DEEP_IDLE modes, the first boot loader
should be loaded again. These software reset that wake up from DEEP_STOP and DEEP_IDLE statuses are
classified as reset group2.
If system enters into all power down modes, the current system status should be saved to safe memory region
such as DRAM, so that the system continues processing seamlessly after waking up from power down modes.
Finally, the restoring previous state function is required on wake up from SLEEP, DEEP_STOP, and DEEP_IDLE
modes.
Summary of Contents for S5PC110
Page 4: ...Section 1 OVERVIEW ...
Page 28: ...Section 2 SYSTEM ...
Page 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Page 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Page 474: ...Section 3 BUS ...
Page 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Page 506: ...Section 4 INTERRUPT ...
Page 537: ...Section 5 MEMORY ...
Page 540: ......
Page 703: ...Section 6 DMA ...
Page 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Page 737: ...Section 7 TIMER ...
Page 795: ...Section 8 CONNECTIVITY STORAGE ...
Page 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Page 1100: ...Section 9 MULTIMEDIA ...
Page 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Page 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Page 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Page 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Page 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Page 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Page 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Page 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Page 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Page 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Page 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Page 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Page 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Page 1798: ...Section 10 AUDIO ETC ...
Page 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Page 1951: ...Section 11 SECURITY ...
Page 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Page 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Page 2005: ...Section 12 ETC ...
Page 2039: ...Section 13 SIZE BALL MAP ...
