Samsung S5PC110, Manual

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List of Figures
Figure Title Page
Number Number
Figure 2-1 GPIO Block Diagram ........................................................................................................................ 2-8
Figure 3-1 S5PC110 Clock Domains ................................................................................................................. 3-1
Figure 3-2 S5PC110 Top-Level Clocks.............................................................................................................. 3-2
Figure 3-3 S5PC110 Clock Generation Circuit 1 ............................................................................................... 3-9
Figure 3-4 CLKOUT Waveform with DCLK Divider ......................................................................................... 3-52
Figure 4-1 State Transition Diagram of Power Mode....................................................................................... 4-17
Figure 4-2 Internal Operation During Power Mode Transition ......................................................................... 4-18
Figure 4-3 Cortex-A8 Power Mode Transition Diagram................................................................................... 4-22
Figure 4-4 Power-ON/OFF Reset Sequence ................................................................................................... 4-34
Figure 5-1 Intelligent Energy Manager Solution................................................................................................. 5-1
Figure 5-2 IEM Block Diagram ........................................................................................................................... 5-3
Figure 5-3 PowerWise Performance Tracking and Voltage Adjustment............................................................ 5-6
Figure 5-4 IEM Closed-Loop Voltage Generation Flow in HPM and APC1..................................................... 5-14
Figure 5-5 IEM Closed-Loop Control Flow in APC1 HPM Delay ..................................................................... 5-15
Figure 5-6 HPM Delay Tap structure in S5PC110 ........................................................................................... 5-16
Figure 6-1 Block Diagram of Booting Time Operation ....................................................................................... 6-2
Figure 6-2 Total Booting Code Sequence Flow Chart ....................................................................................... 6-4
Figure 6-3 Secure Booting Diagram................................................................................................................. 6-10