Samsung S5PC110, Manual

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S5PC110_UM 1 DMA CONTROLLER
1-26
1.3.1 KEY INSTRUCTION
To run the channel thread, you must write assembly code.
The description of key instruction is listed below. For full instruction set, refer to Chapter 4, “PL330 TRM”.
1.3.1.1 DMAMOV
“Move” instructs the DMAC to move 32-bits immediately into Source Address REG (SAR), Destination Address
REG (DAR), and Channel Control REG (CCR).
SAR
− A. Example: DMAMOV SAR, 0x24000000
o
0x2400_0000 is the source address of DMA operation.
DAR
− A. Example: DMAMOV DAR, 0x24001000
o
0x2400_1000 is destination address of DMA operation.
CCR
− A. Example: DMAMOV CCR, SB2 SS32 SP0 DB2 DS32 DP0
o
Source: Burst length is 2, 32-bit data width.
o
Destination: Burst length is 2, 32-bit data width.
o
SP0 and DP0 mean normal and secure respectively. SP2 and DP2 means normal and non-secure
respectively
− B. Refer to pages 4-25~4-26 in Chapter 4, “PL330 TRM” to know about the exact DMA setting such as
burst length, bit-width, address increment, and so on.