S5PC110_UM
5 USB2.0 HS OTG
5-61
HCCHARn
Bit
Description
R/W
Initial State
Reserved [16]
-
- 1'b0
EPDir
[15]
Endpoint Direction Endpoint Type
Indicates the transfer type selected.
•
1'b0: Out
•
1'b1: In
R/W 1'b0
EPNum
[14:11] Endpoint Number
Indicates the endpoint number on the device serving as the data
source or sink.
R/W 4'h0
MPS
[10:0] Maximum Packet Size
Indicates the maximum packet size of the associated endpoint.
R/W 11'h0
5.8.6.2 Host Channel-n Split Register (HCSPLTn, R/W, Address = 0xECn*20h)
Channel_number: 0
≤
n
≤
15
HCSPLTn
Bit
Description
R/W
Initial State
SpltEna
[31]
Split Enable
The application sets this field to indicate that this channel is
enabled to perform split transactions.
R/W 1'b0
Reserved [30:17]
-
-
14'h0
CompSplt
[16]
Do Complete Split
The application sets this field to request the OTG host to perform
a complete split transaction.
R/W 1'b0
XactPos
[15:14] Transaction Position
This field is used to determine whether to send all, first, middle,
or last payloads with each OUT transaction.
•
2'b11: All. This is the entire data payload is of this transaction.
•
2'b10: Begin. This is the first data payload of this transaction.
•
2'b00: Mid. This is the middle payload of this transaction.
•
2'b01: End. This is the last payload of this transaction.
R/W 2'h0
HubAddr
[13:7] Hub Address
This field holds the device address of the transaction translator's
hub.
R/W 7'h0
PrtAddr
[6:0]
Port Address
This field is the port number of the recipient transaction
translator.
R/W 7'h0
Summary of Contents for S5PC110
Page 4: ...Section 1 OVERVIEW ...
Page 28: ...Section 2 SYSTEM ...
Page 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Page 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Page 474: ...Section 3 BUS ...
Page 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Page 506: ...Section 4 INTERRUPT ...
Page 537: ...Section 5 MEMORY ...
Page 540: ......
Page 703: ...Section 6 DMA ...
Page 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Page 737: ...Section 7 TIMER ...
Page 795: ...Section 8 CONNECTIVITY STORAGE ...
Page 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Page 1100: ...Section 9 MULTIMEDIA ...
Page 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Page 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Page 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Page 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Page 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Page 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Page 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Page 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Page 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Page 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Page 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Page 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Page 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Page 1798: ...Section 10 AUDIO ETC ...
Page 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Page 1951: ...Section 11 SECURITY ...
Page 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Page 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Page 2005: ...Section 12 ETC ...
Page 2039: ...Section 13 SIZE BALL MAP ...