S5PC110_UM
5 USB2.0 HS OTG
5-67
5.8.7.2 Device Control Register (DCTL, R/W, Address = 0xEC00_0804)
DCTL
Bit
Description
R/W
Initial State
Reserved [31:17]
-
-
15'h0
NakOnBable
[16]
Set NAK automatically on babble (NakOnBble). The core
sets NAK automatically for the endpoint on which babble is
received
R/W 1'b0
IgnrFrmNum [15]
Ignore
frame
number for Isochronous end points
Do NOT program IgnrFrmNum bit to 1'b1 when the core is
operating in threshold mode. This feature is not applicable to
High Speed, High bandwidth transfers.
When this bit is enabled, there must be only one packet per
descriptor.
•
0: The core transmits the packets only in the frame number
in which they are intended to be transmitted.
•
1: The core ignores the frame number, sending packets
immediately as the packets are ready.
When Scatter/Gather DMA mode is disabled, this field is
reserved, and reads 1’b0.
•
In Scatter/Gather DMA mode, if this bit is enabled, the
packets are not flushed when a ISOC IN token is received for
an elapsed frame.
R/W 1’b0
GMC [14:13]
Global
Multi
Count.
GMC must be programmed only once after initialization.
Applicable only for Scatter/Gather DMA mode. This indicates
the number of packets to be serviced for that end point
before moving to the next end point. It is only for non-periodic
end points.
•
2’b00: Invalid.
•
2’b01: 1 packet.
•
2’b10: 2 packets.
•
2’b11: 3 packets.
When Scatter/Gather DMA mode is disabled, this field is
reserved. And reads 2’b00.
R/W 2’b01
Reserved [12]
-
- -
PWROnPrgDone [11] Power-On
Programming
Done
The application uses this bit to indicate that register
programming is complete after a wake-up from Power Down
mode.
R/W 1'b0
CGOUTNak
[10]
Clear Global OUT NAK
A write to this field clears the Global OUT NAK.
W 1'b0
SGOUTNak
[9]
Set Global OUT NAK
A write to this field sets the Global OUT NAK.
The application uses this bit to send a NAK handshake on all
OUT endpoints.
The application must set this bit after making sure that the
Global OUT NAK Effective bit in Core Interrupt Register is
cleared.
W 1'b0
Summary of Contents for S5PC110
Page 4: ...Section 1 OVERVIEW ...
Page 28: ...Section 2 SYSTEM ...
Page 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Page 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Page 474: ...Section 3 BUS ...
Page 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Page 506: ...Section 4 INTERRUPT ...
Page 537: ...Section 5 MEMORY ...
Page 540: ......
Page 703: ...Section 6 DMA ...
Page 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Page 737: ...Section 7 TIMER ...
Page 795: ...Section 8 CONNECTIVITY STORAGE ...
Page 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Page 1100: ...Section 9 MULTIMEDIA ...
Page 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Page 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Page 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Page 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Page 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Page 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Page 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Page 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Page 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Page 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Page 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Page 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Page 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Page 1798: ...Section 10 AUDIO ETC ...
Page 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Page 1951: ...Section 11 SECURITY ...
Page 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Page 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Page 2005: ...Section 12 ETC ...
Page 2039: ...Section 13 SIZE BALL MAP ...