Samsung S5PC110, Manual

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S5PC110_UM 5 INTELLIGENT ENERGY MANAGEMENT
5-39
5.5.3.16 PWI Clock Division Register (APC_CLKDIV_PWICLK, R/W, Address = 0xE070_0040)
APC_CLKDIV_PWICLK Bit Description Initial State
Reserved [7:4] Read undefined. Write as zero. 0
Programmable Clock
Division [3:0] Programmable division to theapc_refclk_c clock frequency
for the PWI clock. The clock division is equal to 2 *
(APC_CLKDIV_ 1). 0x0
5.5.3.17 APC Overshoot Limit Register (APC_OVSHT_LMT, R/W, Address = 0xE070_0050)
APC_OVSHT_LMT Bit Description Initial State
overshoot limit [7:0] Overshoot limit during the voltage slew in the closed-loop
mode. 0x00
5.5.3.18 APC Closed-loop Control Register (APC_CLP_CTRL, R/W, Address = 0xE070_0054)
APC_CLP_CTRL Bit Description Initial State
Reserved [7:4] Undefined. Write as zero. 0
APC_SS_GAIN_EN [3] Enables steady state gain term. 0
APC_UP_GAIN_EN [2] Enables the APC_GAIN2 term for the dynamic
compensator. This gain term is selected during voltage
upward slew. 0
APC_LOW_GAIN_EN [1] Enables the APC_GAIN4 term for the dynamic
compensator. This gain term is selected when the slack or
eHPM value is b3 to -3. 0
APC_SAT_GAIN_EN [0] Enables the APC_GAIN3 term for the dynamic
compensator. This gain term is selected when the PC value
is saturated and the voltage is stepping up. This gain term
has higher priority over the gain term 2. 0
5.5.3.19 APC Steady State Slew Rate Register (APC_SS_SRATE, R/W, Address = 0xE070_0058)
APC_SS_SRATE Bit Description Initial State
Reserved [7:4] Read undefined. 0
APC_SS_SMP_RATE [3:2] 00 Sample the eHPM every 32 apc_refclk_c cycles.
01 Sample the eHPM every 16 apc_refclk_c cycles.
10 Sample the eHPM every 8 apc_refclk_c cycles.
11 Sample the eHPM every apc_refclk_c cycle.
0x0
APC_GAIN_SEL [1:0] 00 Gain term value of 0 in steady state mode.
01 Gain term value of 1 in steady state mode.
10 Gain term value of 2 in steady state mode.
11 Gain term value of 3 in steady state mode.
0x0