Samsung S5PC110, Manual

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S5PC110_UM 5 USB2.0 HS OTG
5-91
DIEPTSIZn/
DOEPTSIZn
Bit Description R/W Initial State
(maximum size or short packet) is written to the RxFIFO.
XferSize [18:0]
Transfer Size
This field contains the transfer size in bytes for the current
endpoint. The core only interrupts the application after it has
exhausted the transfer size amount of data. The transfer size can
be set to the maximum packet size of the endpoint, to be
interrupted at the end of each packet.
•
IN Endpoints: The core decrements this field every time a
packet from the external memory is written to the TxFIFO.
•
OUT Endpoints: The core decrements this field every time a
packet is read from the RxFIFO and written to the external
memory.
R/W 19'h0
5.8.7.20 Device Endpoint-n DMA Address (DIEPDMAn/DOEPDMAn, R/W, Address = 0xEC0n*20h,
0xEC0n*20h)
Endpoint_number : 0
≤
n
≤
15
The starting DMA address must be DWORD-aligned.
DIEPDMAn/
DOEPDMAn
Bit Description R/W Initial State
DMAAddr [31:0] DMA Address
Holds the start address of the external memory for storing or
fetching endpoint data.
Note: For control endpoints, this field stores control OUT data
packets as well as SETUP transaction data packets. When
more than three SETUP packets are received back-to-back,
the SETUP data packet in the memory is overwritten.
This register is incremented on every AHB transaction. The
application can give only a DWORD-aligned address.
•
When Scatter/Gather DMA mode is not enabled, When
Scatter/Gather DMA mode is not enabled, the application
programs the start address value in this field.
When Scatter/Gather DMA mode is enabled, this field indicates
the base pointer for the descriptor list.
R/W 32'h0