Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 5 Interrupts
FEUL620Q504 5–27
5.2.12 Interrupt Level Control Register 1 (ILC1)
Address: 0F024H
Access: R/W
Access size: 8/16 bits
Initial value: 0000H
7 6 5 4 3 2 1 0
ILC1L L1EXI3 L0EXI3 L1EXI2 L0EXI2 L1EXI1 L0EXI1 L1EXI0 L0EXI0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
ILC1H L1EXI7 L0EXI7 L1EXI6 L0EXI6 L1EXI5 L0EXI5 L1EXI4 L0EXI4
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
The interrupt level control register 1 is a special function register (SFR) used to set the level of the interrupt
source enabled by IE1.
Write access to this register is possible only when the interrupt level control is enabled by the ILEN register.
Level 1 to 4 can be set for each interrupt source. The register which has the higher level is given the higher
priority.
Description of Bits
•
L1-0EXI0 (bits 1 to 0)
L1-0EXI0 set the level of the external interrupt 0 (EXI0INT).
L1EXI0 L0EXI0 Description
0 0 Level 1 (initial value)
0 1 Level 2
1 0 Level 3
1 1 Level 4
•
L1-0EXI1 (bits 3 to 2)
L1-0EXI1 set the level of the external interrupt 1 (EXI1INT).
L1EXI1 L0EXI1 Description
0 0 Level 1 (initial value)
0 1 Level 2
1 0 Level 3
1 1 Level 4
•
L1-0EXI2 (bits 5 to 4)
L1-0EXI2 set the level of the external interrupt 2 (EXI2INT).
L1EXI2 L0EXI2 Description
0 0 Level 1 (initial value)
0 1 Level 2
1 0 Level 3
1 1 Level 4