ML620Q503/Q504 User's Manual
Chapter 20 Port 3
FEUL620Q504 20–12
20.2.5 Port 3 Mode Register (P3MOD)
Address: 0F22CH
Access: R/W
Access size: 8/16 bit
Initial value: 0000H
7
6
5
4
3
2
1
0
P3MOD0
P37MD0
P36MD0
P35MD0
P34MD0
P33MD0
P32MD0
P31MD0
P30MD0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
P3MOD1
P37MD1
P36MD1
P35MD1
P34MD1
P33MD1
P32MD1
P31MD1
P30MD1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
P3MOD0 and P3MOD1 are special function registers (SFRs) used to select the primary, secondary, tertiary, or
quartic function of the port 3.
Description of Bits
•
P30MD1-0
(bits 8,0)
The P30MD1-0 bits are used to select the primary, secondary, tertiary, or quartic function of the P30
pin.
P30MD1 P30MD0
Description
0
0
General-purpose input/output mode, External interrupt mode (initial
value)
0
1
I
2
C bus data input/output mode (SDA0)
1
0
Synchronous serial port data output mode (SOUT0)
1
1
UART data input mode (RXD0)
•
P31MD1-0
(bits 9,1)
The P31MD1-0 bits are used to select the primary, secondary, tertiary, or quartic function of the P31 pin.
P31MD1 P31MD0
Description
0
0
General-purpose input/output mode, External interrupt mode (initial
value)
0
1
I
2
C bus clock output mode (SCL0)
1
0
Synchronous serial port data input mode (SIN0)
1
1
UART data output mode (TXD0)
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...