Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 28 Voltage Level Supervisor
FEUL620Q504 28-5
28.2.3 Voltage level supervisor mode register (VLSMOD)
Address: 0F902H
Access: R/W
Access size: 8/16 bit
Initial value: 0000H
7 6 5 4 3 2 1 0
VLSMODL – – – – – – VLSSEL1 VLSSEL0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value* 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
VLSMODH – – – – – VLSAMD1 VLSAMD0 VLSSM0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value* 0 0 0 0 0 0 0 0
*: it is not reset when VLS reset is issued.
VLSMOD is a special function register (SFR) used to control the voltage level detection function.
It is necessary to set this register during the VLS is in the OFF state (ENVLS=”0”).
Description of Bits
•
VLSSEL1-0 (bits 1 to 0)
The VLSSEL1-0 bits are used to control enable/disable of the VLS reset/VLS interrupt request functions
when the voltage is lower than the threshold voltage.
VLSSEL1 VLSSEL0 Description
0 0 Reset function: disable, Interrupt request function: disable
(initial value)
0 1 Reset function: enable, Interrupt request function: disable
1 0 Reset function: disable, Interrupt request function: enable
1 1 Reset function: enable, Interrupt request function: disable
•
VLSSM0 (bit 8)
The VLSSM0 bit is used to select whether or not to use sampling for the VLS detection.
VLSSM0 Description
0 Detects without sampling (initial value)
1 Detects with sampling (T16KHZ 2
φ
)
[Note]
In the STOP mode, no sampling is performed regardless of the value set in VLSSM0 since the sampling clock stops. The
sampling depends on the frequency of LSCLK.