Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 13 UART
FEUL620Q504 13–9
13.2.8 UART0 Receive Status Register (UA0STAT)
Address: 0F716H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
UA0STAT – – – – – U0PER U0OER U0FER
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
UA0STAT is a special function register (SFR) used to indicate the UART state in receive operations.
When any data is written to UA0STAT, all the flags are initialized to "0".
Description of Bits
•
U0FER (bit 0)
The U0FER bit is used to indicate occurrence of a framing error of the UART.
When an error occurs in the start or stop bit, the U0FER bit is set to "1". U0FER is updated each time
reception is completed.
U0FER Description
0 No framing error (initial value)
1 With framing error
•
U0OER (bit 1)
The U0OER bit is used to indicate occurrence of an overrun error of the UART.
If the received data in the transmit/receive buffer (UA0BUF) is received again before it is read, this bit is
set to "1". Even if reception is stopped by the U0EN bit and then reception is restarted, this bit is set to
"1" unless the previously received data is not read. Therefore, make sure that data is always read from
the
receive buffer even if the data is not required.
U0OER Description
0 No overrun error (initial value)
1 Overrun error
•
U0PER (bit 2)
The U0PER bit is used to indicate occurrence of a parity error of the UART.
When the parity of the received data and the parity bit attached to the data do not coincide, this bit is set
to "1". U0PER is updated whenever data is received.
U0PER Description
0 No parity error (initial value)
1 Parity error