Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 12 Synchronous Serial Port with FIFO
FEUL620Q504 12–28
12.3.15 Mode Fault (MDF)
A mode fault error occurs if the SSF0 signal becomes low level in Master mode. (SF0SRR's SF0MDF is set.) If
this bit becomes 1, it indicates that there is risk of two or more masters competing for the bus.
When a mode fault error occurs, SSIOF performs the following operations since there is a risk of bus latch-up:
1. Automatically sets the SF0MST bit of SF0CTRL to 0 (slave).
2. Automatically sets the SF0SPE bit of SF0CTRL to 0 (disabled) to make the SSIOF unable to transfer.
3. Set SF0MDF of SF0SRR, and also generates an interrupt if the SF0MDFE bit of SF0CTRL is 1
(interrupt permitted).
The system should resolve the causes of the mode fault, and then clear SF0MDF according to the following steps:
1. Write 1 in SF0MDF to clear it.
2. Set SF0CTRL again.
Figure 12- shows the timing that allows a mode fault operation.
LEAD_stat
e
SSn_M
SCK
LAG_state
SCK_state
LEAD_stat
e
DTL IDLE IDLE
Master
state
MDF operation interval
HiZ HiZ
SCK (CKZ=0)
MDF operation interval
MDF
SSn_S
Hiz guard
interval
Figure 12-11 Timing That Allows Mode Fault Operation
SF0MDF
SSF0(master)
SSF0(slave)
SCKF0
LEAD_state