Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 12 Synchronous Serial Port with FIFO
FEUL620Q504 12–29
12.3.16 Interrupt Source
12.3.16.1 SSIOF Interrupt Source
There are the following five types.
•
Mode fault
If a mode fault (multi-master bus contention) occurs, SF0MDF of SF0SRR is set and a mode fault interrupt
is generated.
•
Overrun
If an overrun occurs, SF0ORF of SF0SRR is set, and an overrun error interrupt is generated.
•
Transmit FIFO threshold
If the remaining data of the transmit FIFO matches the byte count selected with SF0TFIC, SF0TFI of
SF0SRR is set to generate a transmission interrupt.
•
Receive FIFO threshold
If the number of data received in the receive FIFO is equal to or more than following the byte count selected
with SF0RFIC of SF0CR, SF0RFI of SF0SRR is set to generate a reception interrupt.
•
End of transfer
If the transmit FIFO becomes empty and the transfer of the last byte is finished, SF0FI of SF0SRR is set to
generate a transfer end interrupt.
12.3.16.2 Clear SSIOF Interrupt
An interrupt request is cleared by writing 1 to each interrupt bit (SF0TFI, SF0RFI, SF0MDF, SF0ORF, and
SF0FI) of the SF0SRR.
12.3.16.3 SSIOF Interrupt Timing
Figure 12-12 shows the interrupt timing.
The remaining transmit byte count interrupt (TFI) generates an interrupt in 1 to 2 SYSCLK after the shift clock
of the second bit.
For receive byte count interrupt (RFI), transfer completion interrupt (FI), and overrun (ORF), an interrupt is
generated in 1 to 2 SYSCLK after the sampling clock at the MSB.
For MDF, an interrupt is generated at a mode fault occurrence.
SCK
SSN
MOSI/
MISO
LSB MSB
SCK Cycle 1 2 3 4 5 6 7 8
TFI
interrupt
FI,RFI,ORF
interrupt
Figure 12-12 Interrupt Timing
SSF0
SCKF0
Cycle
SCKF0
SOUTF0/
SINF0
TFI
interrupt
FI,RFI,ORF
interrupt