Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 24 RC Oscillation Type A/D Converter
FEUL620Q504 24-20
Figure 24-14 Timing Diagram for 1 Cycle of A/D Conversion (Example)
<First step>

Set the base clock to LSCLK (32.768kHz). (Write “00H” in FCON0.)
k
Preset “1000000H – nA0” in Counter A.
l
Preset “000000H” in Counter B.

Write “01H” in RADMOD to select Counter A reference mode and the oscillation mode that uses
reference resistance RS0.
n
Write “01H” in RADCON to start A/D conversion operation.
o
Write “1” in the HLT bit of SBYCON (see Chapter 4, “MCU”) to set the device to HALT mode.
[Note]
In this example, nA0 is set to 4B0H because the gate time “nA0 x tBSCLK” in oscillation mode with
reference resistor RS0 is set to 0.366 second. The value of nA0 is related to how much the margin of the
quantization error of the A/D conversion is: the greater the nA0 value is, the smaller the margin of error
becomes.
To reduce noise contamination to the RC oscillator circuit caused by CPU operation, it is recommended to
constantly put the device into HALT mode during operation of RC oscillation.
From this point of time, the RC oscillator circuit (RCOSC0) continues oscillation for about 0.366 second with the
reference resistance RS0. Then, when Counter A overflows, the RADINT signal is set to “1” and an RC-ADC
interrupt request is generated. (Section a). Also, the generation of interrupt request releases HALT mode (section
b) and at the same time, A/D conversion operation stops. (Section c, RARUN bit = "0"). At this time, Counter A
is set to “000000H”.
The content of Counter B at this time is expressed by the following expression:
nB0 = nA0•
t
BSCLK
... Expression B
t
RCCLK
(RS0)
That completes the operations in First Step.
<Second step>
p
Calculate “1000000H – nB0” from the content of Counter B “nB0” and set the obtained value in Counter
B.
At this point, Counter A needs to be cleared; however, no processing is required since the counter is
already set to “000000H”.

Write “12H” in RADMOD to select Counter B reference mode and the oscillation mode that uses
thermistor RT0.
r
Write “01H” in RADCON to start A/D conversion operation.
s
Write “1” in the HLT bit of SBYCON (see Chapter 4, “MCU”) to set the device to HALT mode.
The RC oscillator circuit (RCOSC0) oscillates with thermistor RT0 from this point until Counter B overflows.
This period is equal to the product of “nB0” obtained in the First Step and the oscillation period t
RCCLK
(RT0)
using RT0.
When Counter B overflows, the RADINT signal is set to “1” and an RC-ADC interrupt request is generated.
(Section d). Also, the generation of interrupt request releases HALT mode (section e) and at the same time, A/D
conversion operation stops. (Section f, RARUN bit = "0").
This completes the operations in Second Step.