ML620Q503/Q504 User's Manual
Chapter 28 Voltage Level Supervisor
FEUL620Q504 28-4
•
ENVLS
(bit 8)
The ENVLS bit is used to control ON/OFF of the VLS.
VLS is turned on when ENVLS is set to "1", and off when “0”.
When the VLS reset is issued, the VLS keep the ON state.
ENVLS
Description
0
VLS: OFF (initial value)
1
VLS : ON
[Note]
Set VLSLV3 to VLSLV0 bits to any one of between”3”~”B”h, before setting ENVLS bit to “1”.
Operation is not guaranteed in the case of the other setting.
•
VLSF
(bit 9)
VLSF is the voltage level detection flag.
It is “0” when the power supply voltage (V
DD
) is higher than the threshold voltage (V
VLS
), or “1” when
the power supply voltage is lower than the threshold voltage. VLSF is initialized to 0 when VLS is set to
on (ENVLS=1).
VLSF
Description
0
Higher than the threshold voltage (initial value)
1
Lower than the threshold voltage
•
VLSRF
(bit 10)
The VLSRF flag is used to indicate whether the voltage level detection result is valid.
When the threshold voltage value becomes valid (readable from CPU), this becomes ”1”.
VLSRF
Description
0
VLS is OFF or VLS is being judged (initial value)
1
VLS judgment result is valid
[Note]
Make sure that the VLSRF bit is set to ”1” before enabling the STOP mode.
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...