ML620Q503/Q504 User's Manual
Chapter 5 Interrupts
FEUL620Q504 5–42
5.2.20 External Interrupt Control Registers 23 (EXICON23)
Address: 0F042H
Access: R/W
Access size: 8/16 bit
Initial value: 0000H
7
6
5
4
3
2
1
0
EXICON2
EXI7SM
EXI6SM
EXI5SM
EXI4SM
EXI3SM
EXI2SM
EXI1SM
EXI0SM
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
EXICON3
EXI7FL
EXI6FL
EXI5FL
EXI4FL
EXI3FL
EXI2FL
EXI1FL
EXI0FL
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
EXICON23 is a special function register (SFR) used to select the interrupt edge of external interrupt.
Description of Bits
•
EXI7-0SM
(bits 7 to 0)
The EXI7-0SM bits are used to select detection of signal edge for an external interrupt with or without
sampling. The sampling clock is T16KHz of the low-speed time base counter (LTBC).
EXI7SM to EXI0SM
Description
0
Detects the input signal edge for an external interrupt without sampling
(initial value).
1
Detects with sampling
[Note]
In STOP mode, since the sampling clock (T16KHZ) stops, no sampling is performed regardless of the
values set in EXI7SM to EXI0SM.
•
EXI7-0FL
(bits 15 to 8)
The EXI7-0FL bits are used to select detection of signal edge for an external interrupt with or without
noise filter.
EXI7FL to EXI0FL
Description
0
Detects without noise filter (initial value)
1
Detects with noise filter
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...