Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 15 I
2
C Bus Interface
FEUL620Q504 15–10
15.2.7 I
2
C Bus n Status Register (I2CnSTAT : n=0,1)
Address: 0F74AH(I2C0STAL/I2C0STAT), 0F74BH(I2C0STAH)
0F75AH(I2C1STAL/I2C1STAT), 0F75BH(I2C1STAH)
Access: R
Access size: 8/16 bits
Initial value: 0000H
7 6 5 4 3 2 1 0
I2CnSTAL – – – – – I2nER I2nACR –
R/W R R R R R R R R
Initial value 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
I2CnSTAH – – – – – – – –
R/W R R R R R R R R
Initial value 0 0 0 0 0 0 0 0
I2CnSTAT is a read-only special function register (SFR) to indicate the state of the I
2
C bus interface.
Description of Bits
•
I2nACR (bit 1)
The I2nACR bit is used to store the acknowledgment signal received. Acknowledgment signals are
received each time the slave address is received and data transmission or reception is completed. The
I2nACR bit is set to “0” when the I2nEN bit of I2CnMOD is “0”.
I2nACR Description
0 Receives acknowledgment “0” (initial value)
1 Receives acknowledgment “1”
•
I2nER (bit 2)
The I2nER bit is a flag to indicate a transmit error. When the value of the bit transmitted and the value of
the SDA pin do not coincide, this bit is set to “1”. The SDA pin output continues until the subsequent
byte data communication terminates, even if the I2nER bit is set to “1”.
The I2nER bit is set to “0” when a write operation to I2CnCON is performed. The I2nER bit is set to “0”
when the I2nEN bit of I2CnMOD is set to “0”.
I2nER Description
0 No transmit error (initial value)
1 Transmit error