ML620Q503/Q504 User's Manual
Chapter 6 Clock Generation Circuit
FEUL620Q504
6–8
•
LOSCON
(bit 11)
The LOSCON bit also permits the low-speed crystal oscillator circuit to oscillate when the low-speed
built-in RC oscillation mode is selected. When LOSCON is turned to "1", the low-speed crystal
oscillator circuit is enabled to oscillate at the same time even though the built-in RC oscillation mode is
selected by the XTM1 or XTM0 bit.
Note that the low-speed crystal oscillation clock at this time is supplied only to the timer block. Clocks
selected by the XTM1 and XTM0 bits are supplied to peripherals other than the timer block. If the
low-speed crystal oscillation is selected as the clock for timer block, set the LOSCON bit to "1".
LOSCON
Description
0
Prohibit low-speed crystal oscillation when the low-speed built-in RC oscillation
mode is selected (initial value)
1
Permit low-speed crystal oscillation when the low-speed built-in RC oscillation mode
is selected
•
LOSST
(bit 14)
LOSST is the flag used to indicate the oscillation state of the low-speed crystal oscillator circuit.
LOSST
Description
0
The low-speed crystal oscillation has stopped, or the low-speed crystal oscillation
stabilization time is being counted (initial value)
1
The low-speed crystal oscillation is in the stable state
•
HOSST
(bit 15)
HOSST is the flag used to indicate the oscillation state of the high-speed crystal/ceramic oscillator
circuit.
HOSST
Description
0
The high-speed crystal/ceramic oscillation has stopped, or the stabilization time is
being counted (initial value)
1
The high-speed crystal/ceramic oscillation is in the stable state
[Note]
•When switching the high-speed clock mode using the OSCM1 and OSCM0 bits, please first stop the
high-speed oscillation(set the ENOSC bit of FCON1 register to “0”) and then set the system clock to the
low-speed clock (set the SYSCLK bits of the FCON1 register to "0").
• In the high-speed external clock input mode, input a clock that does not exceed 16MHz.
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...