Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 12 Synchronous Serial Port with FIFO
FEUL620Q504 12–11
12.2.6 SIOF0 Status Register (SF0SRR)
Address: 0F788H
Access: R
Access size: 8/16 bits
Initial value: 1400H
7 6 5 4 3 2 1 0
SF0SRRL – – SF0SPIF SF0MDF SF0ORF SF0FI SF0RFI SF0TFI
R/W R R R R R R R R
Initial value 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
SF0SRRH – – – SF0RFE SF0RFF SF0TFE SF0TFF SF0WOF
R/W R R R R R R R R
Initial value 0 0 0 1 0 1 0 0
SF0SRR is a special function register (SFR) used to indicate the data transfer state and error state of the SSIOF.
Description of Bits
•
SF0TFI (bit 0)
SF0TFI indicates a transmission interrupt.
A transmission interrupt occurs if the remaining data in the transmit FIFO matches the byte count
selected with SF0TFIC.
SF0TFI Description
0 No interrupt request (initial value)
1 Interrupt request
•
SF0RFI (bit 1)
SF0RFI indicates a reception interrupt.
If the number of data received in the receive FIFO is equal or more byte count selected with SF0RFIC ,
reception interrupt occur.
SF0RFI Description
0 No interrupt request (initial value)
1 Interrupt request
•
SF0FI (bit 2)
SF0FI indicates a transfer end interrupt. (the transmit FIFO is empty and the transfer of the last one byte
(one word) is finished)
SF0FI Description
0 No interrupt request (initial value)
1 Interrupt request